General Thoughts

This course tries to teach you a deeper dive into VHDL and how to design advanced digital systems, although, in my opinion, it doesn't do a really good work at that… Besides the projects on the course being a little bit boring, it uses an hardware description language that is not mainly used in industry or even used by a lot of professors doing thesis (VHDL) instead of using Verilog of SystemVerilog.

Classes

The theoretical classes are REEEEEEEEEEALY boring and honestly you're better just trying to learn the slides on your own, which teaches you about how FPGA's...